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Oral S18: New Techniques in Emerging Designs

Aug. 7, 2020 10:40 AM - 11:40 AM

Room: 玉蘭廳
Session chair: 陳依蓉 教授

Towards Optimal Time-Division Multiplexing Assignment for Multi-FPGA Systems
發表編號:O18-1時間:10:40 - 10:55
論文編號:0214
Tung-Wei Lin1, Wei-Chen Tai1 and Iris Hui-Ru Jiang2
1Department of Electrical Engineering, National Taiwan University
2Graduate Institute of Electronics Engineering, National Taiwan University


* Abstract is not available.


 
Improved Tree-Based Logic Encryption for Resisting SAT Attack and Removal Attack
發表編號:O18-2時間:10:55 - 11:10
論文編號:0112
Yi-Chun Tsai1, Yung-Chih Chen1 and Yi-Yu Liu2
1Department of Computer Science & Engineering, Yuan Ze University
2Department of Computer Science and Information Engineering, National Taiwan University of Science and Technology


Logic encryption is an IC protection technique which inserts extra logic and key inputs to hide a circuit's functionality. An encrypted circuit needs to be activated with a secret key for being functional. Recently, a tree-based encryption method was proposed to mitigate a powerful SAT-based attack method. Although the encryption method is effective, it could be vulnerable to a removal-based attack method. Thus, in this paper, we enhance the encryption method to resist the two attack methods simultaneously. We introduce a new type of tree encryption to obfuscate attackers, which is structurally identical to the original one but has different functionality. The experimental results show that the proposed method is effective for encrypting a set of benchmarks from IWLS. Additionally, compared to the state-of-the-art logic encryption methods, the proposed method provides better security for most benchmarks.


 
Symbolic Uniform Sampling with XOR Circuits
發表編號:O18-3時間:11:10 - 11:25
論文編號:0211
Yen-Ting Lin1, Jie-Hong Jiang1 and Victor Kravets2
1Graduate Institute of Electronics Engineering, National Taiwan University
2IBM Thomas J. Watson Research Center


Uniform sampling is an important method in statistics and has various applications in model counting, system verification, algorithm design, among others. Symbolic sampling in a Boolean space is a recently proposed technique that combines sampling and symbolic representation for effective Boolean reasoning. Under the framework of symbolic sampling, we propose a method to construct compact XOR circuits achieving uniform sampling in a given Boolean space. The method is further extended to biased sampling within a focused subspace of interest. Experimental results show the effectiveness of compact sampling circuit generation and its potential to facilitate Boolean reasoning.


 
Bit-Slicing the Hilbert Space: Scaling Up Accurate Quantum Circuit Simulation to a New Level
發表編號:O18-4時間:11:25 - 11:40
論文編號:0212
Yuan-Hung Tsai1, Jie-Hong R. Jiang2,
1Graduate Institute of Electronics Engineering, National Taiwan University
2Graduate Institute of Electronics Engineering, Department of Electrical Engineering, National Taiwan University


Quantum computing is greatly advanced in recent years and is expected to transform the computation paradigm in the near future. Quantum circuit simulation plays a key role in the toolchain for the development of quantum hardware and software systems. However, due to the enormous Hilbert space of quantum states, simulating quantum circuits with classical computers is extremely challenging despite notable efforts have been made. In this paper, we enhance quantum circuit simulation in two dimensions: accuracy and scalability. The former is achieved by using an algebraic representation of complex numbers; the latter is achieved by bit-slicing the number representation and replacing matrix-vector multiplication with symbolic Boolean function manipulation. Experimental results demonstrate that our method can be superior to the state-of-the-art for various quantum circuits and can simulate certain benchmark families with up to tens of thousands of qubits.